Field of the Invention
The present invention relates to methods for protecting groups of digital electronic appliances used collectively for monitoring the operation of machines and for issuing predictions, warnings and calls for preventative maintenance and equipment failure interventions, and more particularly to methods that use computer data processing systems to empanel several artificial intelligence (AI) classification technologies into a “jury” that renders “verdicts” about the need for service and impending equipment failures.
Background
Digital signal processors (DSP) implemented as specialized semiconductor intellectual property (SIP) cores have circuit architectures that have been optimized for the operational needs of digital signal processing. DSP's are used to measure, filter and/or compress continuous real-world analog signals. Many general-purpose microprocessors can also execute digital signal processing algorithms successfully, but dedicated DSP's usually have better power efficiency thus they are more suitable in portable devices such as mobile phones because of power consumption constraints. DSP's frequently use special memory architectures that are able to fetch multiple data and/or instructions at the same time.
Xilinx defines Field Programmable Gate Arrays (FPGA's) as semiconductor devices that are based around a matrix of configurable logic blocks (CLB's) connected via programmable interconnects. FPGA's can be reprogrammed to desired application or functionality requirements after manufacturing. This feature distinguishes FPGA's from Application Specific Integrated Circuits (ASIC's), which are custom manufactured for specific design tasks. Although one-time programmable (OTP) FPGA's are available, the dominant types today are based on static random access memory (SRAM) which can be reprogrammed circuit by circuit as the design evolves.
ASIC's and FPGA's have different value propositions, and so the choices must be evaluated. FPGA's once were selected for their lower speed/complexity/volume designs. But modern FPGA's now push the so-called 500-MHz performance barrier and are benefiting from logic density increases, embedded processors, DSP blocks, clocking, and high-speed serial, at ever lower price points.
Another is to employ a general purpose computer with its inputs, outputs, and processing specially adapted to operate in the device environment and to execute its programming in the ways described herein. Such may be the most flexible way to implement these embodiments, but the costs to do so may be excessive, especially if only a small portion of the computer's capabilities and resources are employed.